1/ Understanding a simple AVR based SDR::R-2R DAC :: DDS
Signal Generator comprises of:
1/ R-2R ladder circuit as DAC driven by uC GPIO
2/ Direct PWM Output as Square Wave
3/ PWM Ouput fed to a LPF for analog signals.
Used For:
1/Generating test signals for frequency and phase modulated circuits.
Author emphasizes on importance of precision of Oscillator used to drive uC.[Expects one with 50 ppm]
Mentions about two frequency standards which will be used for generating external clock source:
1/German DCF77(Time Code) signal on 77.5 kHz
2/French TDF(France Inter) signal on 162 kHz.
3/BBC Radio 4 on 198 kHz.
DDS sine wave generator:
kth sample S[k] = sin (p[k])
p[k+1] = p[k] +d
Phase Accumulator (m- bit precision) <= p[k]
One period ===> 0 - > (2^m)-1
d and phase addition also m-bit precision
==> for 8-bit register set, we have 0-255 phase values ==> I need a lookup table containing 256 values
Author uses m= 32 which corresponds to 1,073,741,824 values !!!==> huge lookup table
(My question --> why such a large value of m ?? )
We will use just top n of m bits of phase accumulator to address the table.ie. n<m. and lookup table size is 2^n
Each sample value is limited in precision by the no. of bits used to represent it.
Let each sample be denoted by r-bits. r--> no. of bits output to DAC.
Authors configuration -->
m=32
n=8
r=8
Usually Ferrite Antenna used.
German Metrology Department transmits weather information on 147.3 kHz using FSK in RTTY format(Radio Tele Type Format)
Am planning a follow up video and matlab attempts to understand DDS in detail.
Wait for it :)
1/ R-2R ladder circuit as DAC driven by uC GPIO
2/ Direct PWM Output as Square Wave
3/ PWM Ouput fed to a LPF for analog signals.
Used For:
1/Generating test signals for frequency and phase modulated circuits.
Author emphasizes on importance of precision of Oscillator used to drive uC.[Expects one with 50 ppm]
Mentions about two frequency standards which will be used for generating external clock source:
1/German DCF77(Time Code) signal on 77.5 kHz
2/French TDF(France Inter) signal on 162 kHz.
3/BBC Radio 4 on 198 kHz.
DDS sine wave generator:
kth sample S[k] = sin (p[k])
p[k+1] = p[k] +d
Phase Accumulator (m- bit precision) <= p[k]
One period ===> 0 - > (2^m)-1
d and phase addition also m-bit precision
==> for 8-bit register set, we have 0-255 phase values ==> I need a lookup table containing 256 values
Author uses m= 32 which corresponds to 1,073,741,824 values !!!==> huge lookup table
(My question --> why such a large value of m ?? )
We will use just top n of m bits of phase accumulator to address the table.ie. n<m. and lookup table size is 2^n
Each sample value is limited in precision by the no. of bits used to represent it.
Let each sample be denoted by r-bits. r--> no. of bits output to DAC.
Authors configuration -->
m=32
n=8
r=8
Usually Ferrite Antenna used.
German Metrology Department transmits weather information on 147.3 kHz using FSK in RTTY format(Radio Tele Type Format)
Am planning a follow up video and matlab attempts to understand DDS in detail.
Wait for it :)
PS:Update : Well, I am finding tough to find time out of work to actually implement and try out stuff.Rather I hope to do analysis after getting overall idea from all the articles.Hence I have started summarizing article -2 , which is present here- SDR::2.Will update/organize/review and make it more of a nice tutorial after that.Need to plan out days and fix timings..Man--pursuing hobbies with work is tough!!
PS : Wrote the script.Adding here my latest today's trail following the post.
PS : Wrote the script.Adding here my latest today's trail following the post.
from numpy import * #importing spicy - scientific computing package from pylab import * #import matplotlib library #Phase accumulator Register phase_acc =0x00000000;#32bit integer #Phase increment Register phase_inc =0x001FFFFF;#Phase inc #256 location - byte addressable sine table #with Quantization introduced due to fixed point x = linspace(0,2*pi,256) y = array(sin(x)) y = (y+1)*100 #First Offset by 1,Then scaled by 100 s.t 0 <value <255 #Switch on Grid on plot grid(True) i=0 data = zeros(10000); while 1: print phase_acc,int(0xFFFFFFFF) #Roll over phase accumulator if (phase_acc + phase_inc) > 0xFFFFFFFF: phase_acc = 0x00000000 else: phase_acc = phase_acc + phase_inc addr = phase_acc>>24;#extracting upper 8 addr bits print addr data[i]=(int(y[addr])) i=i+1; if i==10000: break; #Plotting as discrete point(rather vertical lines) s=arange(0,i,1) vlines(s,100,data); show()